Prof. Dr.-Ing. Christof Paar
- Chair - Chair Eingebettete Sicherheit
- Member - Horst Görtz Institute for IT-Security Horst Görtz Institute for IT-Security
Prof. Dr.-Ing. Christof Paar
Chair for Embedded Security
D - 44780 Bochum
Dept. of Electr. Eng. and Information Sciences
- ID 2/609
- (+49)(0)234 / 32 - 22994
- firstname.lastname@example.org PGP key
- 1991: M.S. in Electrical Engineering, Universität Siegen
- 1994: Ph.D. thesis on "Computer Architectures for Galois Field Arithmetic", Institute for Experimental Mathematics,University of Essen
- 1995-2001: Faculty member in the ECE Department, Worcester Polytechnic Institute, Massachusetts, USA
- 1999: Co-founder of the CHES Workshop (Cryptographic Hardware and Embedded Systems)
- since 2001: Chair for Embedded Security, ECE Department, Ruhr-Universität Bochum
- 2003: co-founder of ESCRYPT GmbH - Embedded Security (now part of Bosch)
- 2004-2007, 2010-2012: Director of the Horst Görtz Institute for IT Security at Ruhr-Universität Bochum
- since 2009: Affiliated Professor at the University of Massachusetts at Amherst
- 2011: IEEE Fellow
- 2012: Spokesperson of the research training group (Graduiertenkolleg) "Cryptography in Ubiquitous Computing"
- Fast software algorithms for cryptographic implementations
- Hardware architectures for cryptography
- Physical attacks against real-world systems
- Cryptanalytical hardware
- Security in embedded applications such as smart cards, cars, etc.
- Security in mobile and ad-hoc networks
- "Constructive and Destructive Aspects of Embedded Security for the Internet of Things", invited tutorial at CCS 2013 (ACM Conference on Computer and Communications Security), November 5, 2013.
- "Physical Attacks in a Physical World" , Invited Talk at the Massachusetts Institute of Technology, June 4, 2010.
- "The Next 10 Years of IT Security:RFID, BMWs and Burglars", Invited talk at Stanford University, August 20, 2008.
- "Light-Weight Cryptography for Ubiquitous Computing", Invited talk at the University of California, Los Angeles (UCLA), Institute for Pure and Applied Mathematics, December 4, 2006.
- "Breaking Ciphers with COPACOBANA - A Cost-Optimized Parallel Code-Breaker", Talk at the Workshop on Cryptographic Hardware and Embedded Systems - CHES 2006, Yokohama, Japan, October 11-1 2006.
- 142021: Bachelor Project Embedded Smartcard Microcontrollers
- 148003: Introduction to Cryptography I
- 148006: Introduction to Cryptography II
- 148150: Implementation of Cryptographic Schemes II
- 141024: Implementation of Cryptographic Schemes
- 142020: Master Practical Course Embedded Smartcard Microcontrollers
- 148151: Master Practical Course FPGA
- 142022: Master Practical Java-Card
Physical Security Evaluation of the Bitstream Encryption Mechanism of Altera Stratix II and Stratix III FPGAs
Preventing Scaling of Successful Attacks: A Cross-Layer Security Architecture for Resource-Constrained Platforms
Proof-of-Concept: Using Homomorphic Cryptography to Provide for Privacy in Modern Vehicular Environments
Fuming Acid and Cryptanalysis: Handy Tools for Overcoming a Digital Locking and Access Control System
Rights Management with NFC Smartphones and Electronic ID Cards: A Proof of Concept for Modern Car Sharing
Side-Channel Attacks on the Bitstream Encryption Mechanism of Altera Stratix II - Facilitating Black-Box Analysis using Software Reverse-Engineering
Privacy Preserving Payments on Computational RFID Devices with Application in Intelligent Transportation Systems
Experimentally Verifying a Complex Algebraic Attack on the Grain-128 Cipher Using Dedicated Reconfigurable Hardware
Wireless security threats: Eavesdropping and detecting of active RFIDs and remote controls in the wild
On the Vulnerability of FPGA Bitstream Encryption against Power Analysis Attacks – Extracting Keys from Xilinx Virtex-II FPGAs
"Modular Integer Arithmetic for Public Key Cryptography". I. Verbauwhede ed. in "Secure Integrated Circuits and Systems"
Three Years of Evolution: Cryptanalysis with COPACOBANA Special-purpose Hardware for Attacking Cryptographic Systems 2009
Evaluating Resistance of MCML Technology to Power Analysis Attacks Using a Simulation-Based Methodology
On the Power of Power Analysis in the Real World: A Complete Break of the KeeLoq Code Hopping Scheme
Security Requirements Engineering in the Automotive Domain: On Specification Procedures and Implementational Aspects
A Simulation-Based Methodology for Evaluating the DPA-Resistance of Cryptographic Functional Units with Application to CMOS and MCML Technologies
Cantor versus Harley: Optimization and Analysis of Explicit Formulae for Hyperelliptic Curve Cryptosystem
DPA on n-bit sized Boolean and Arithmetic Operations and its Application to IDEA, RC6 and the HMAC-Construction
Efficient Implementation of Elliptic Curve Cryptosystems on the TI MSP430x33x Family of Microcontrollers
An FPGA Implementation and Performance Evaluation of the AES Block Cipher Candidate Algorithm Finalists
A New Architecture for a Parallel Finite Field Multiplier with Low Complexity Based on Composite Fields