Power Attacks Resistance of Cryptographic S-boxes with added Error Detection Circuits

F. Regazzoni, Thomas Eisenbarth, J. Großsch¨adl, L. Breveglieri, P. Ienne, I. Koren, Chris­tof Paar

In Proceedings of the 21st IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT’07), Rome, Italy, September 26-28, 2007.

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